Senior Architect, IRIS2 Digital Design

IRIS2 is the new European Union secure satellite constellation. This project is the European Union's answer to the pressing challenges of tomorrow to provide secure connectivity services and enhanced communication capacities to the EU and its Member States as well as to governmental users, private companies and European citizens while ensuring high-speed internet broadband to cope with connec-tivity dead zones.
 
SES – together with other consortium partners and core members - was selected by European Commission to build and to operate the IRIS2 multi-orbit satellite constellation. As the project enters its next phase, our team is expanding to support the development of future services and products enabled by the IRIS2 system. We are now seeking skilled professionals to help shape the service provisioning landscape and ensure the successful deployment of cutting-edge sat-ellite connectivity solutions.
 

Role Description Summary

We are seeking a highly skilled and experienced Digital Design Architect to lead the definition and development of the advanced digital subsystems within the IRIS2 satellite payload and user terminal.

In your role, you will define the digital architecture of multiple subsystems compounding the high-throughput space transport network of the IRIS2 constellation – including, but not limited to, regenerative on-board processor, antenna digital beam-forming subsystem and user link modem. These digital subsystems may leverage a range of implementation technologies, from software-defined platforms (FPGA, SoC, processors) to commercial off-the-shelf (COTS) or custom ASICs.

The work will require close coordination with broader space segment and ground systems to ensure architectural coherence across active antennas, optical terminals, on-board computers, and other key subsystems. 

As a member of an agile project organization, you will be expected to bring a flexible way of working and an adaptive mindset to a dynamic development environment.    
 

Primary Responsibilities 

• Lead the definition for all digital hardware (ASICs, boards or equipment) requirements and associated documentation as well as its submodules.
• Identify and master all relevant FPGA/SoC/Processor/ASIC based architectures for the implementa-tion of onboard regenerative processor unit, digitally beamformed active antennas, and ground user terminal.
• Perform exhaustive exploration of architectural implementations, understand the trade-offs and provide analysis about these.
• Evaluate key performance metrics of architectural trade-off linked to signal integrity, service quality, power consumption, thermal behavior, cost and overall system limitations.
• Define subsystem architectures and associated verification methodologies. 
• Produce and maintain architectural-level documentation to enable downstream firmware, software, electronic, mechanical, and thermal design activities.
• Define technical specifications for digital subsystems in coordination with internal stakeholders and/or with external industrial partners.
• Review and coordinate the electronic, physical, mechanical and thermal design process, providing hands-on support when and where needed to internal or external stakeholders.
• Define, review and coordinate risk mitigation activities which may include, but not limited to, testing prototype models in the lab up to in-orbit demonstration.
• Provide concrete support on performance metrics to other satellite payload and user terminal stakeholders as well as higher assembly level design and analysis.
• Collaborate with cross-functional teams.
• Document digital subsystem design specifications, analyses, test plans, and verification reports. 
• Collaborate with other internal stakeholders as well as with partners in the overall life cycle of the subsystems.
   

Competencies

• Strong ability to work independently and without supervision in complex environments, including matrixed or multi-stakeholder projects
  • Flexibility and adaptability in response to evolving project requirements and dynamic environments
  • Ability to think strategically and align project goals with organizational objectives
  • Excellent problem-solving and decision-making abilities
  • Effective communication skills, both written and verbal
• Strong leadership leveraging proven project and team management skills
• Ability to define high-level requirements and identify key industrial and technology partners
• Proficiency in project management tools and methodologies
• Ability to work under pressure and manage multiple priorities
• Deep understanding of an entire digital electronic equipment development flow, from FPGA/SoC/Processor selection and coding to PCB design, PCB interconnects and complete as-sembly design, integration and test. 
• Strong vision of the entire digital IC design-flow from architectural design, RTL to GDSII. 
• Ability to integrate third-party Intellectual Property (IP).
• Good theoretical and practical understanding of digital signal processing. Experience in the design of high-speed digital signal processing blocks with multi-power and multi-clock domain constraints.
• Hands-on with EDA tools for electronic design such as Altium Designer and similar.
• Design and verification experience with Mixed-Signal ICs such as A/D Converters, D/A Converters, modems, channelizer and beamforming functions, high-speed Serdes interfaces (JESD204C, PCIe, Ethernet) as well as low speed (CAN, SPI, and I2C, RS-422/485).
• Familiar with software defined design procedures including functional and timing analysis, ideally in Digital Signal Processing applications.
• Familiar with Physical and MAC layer functions of 4G, 5G and/or DVB-S2X.
• Familiar with Network layer concepts, functions and protocols (p.ex. MPLS, VPNs, TCP, UDP, L2/L3 switches, VLANs, etc).
• Understanding of space industry standard best practices for design, verification, test, and deploy-ment. 
• Understanding of space-based design techniques and radiation mitigation in electronic design.
• Understanding of environmental (thermal, mechanical) constraints of space hardware.
• Ability to perform reliability analysis of electronic equipment such as worst case, failure propagation, parts stress and derating analysis, end of life reliability, etc.
• Understanding of space based EEE parts selection process for adequate reliability, screening, avoid-ing counterfeit. 
   

Qualifications & Experience

• Master's degree or Ph.D. in electrical engineering, computer engineering, or a similar discipline.
• 10+ years of electronic equipment design experience, preferably in the space sector. 
• Hands-on experience in implementing FPGA, RF SoC, ASIC and processor-based designs.
• Fluency in English, any other language considered as an asset
   

Other Key Requirements/Comments

• The candidate must be eligible for a “SECRET” security clearance, in accordance with the “loi modi-fiée du 15 juin 2004 relative à la classification des pièces et aux habilitations de sécurité”, as well as EU/ESA/NATO equivalents
• Willing to work at least 66% onsite from office 
• Travel as required for project realization purposes